From 2253d2729a77bd71408915c7ffb9c0d7df20c0ff Mon Sep 17 00:00:00 2001 From: Veit Heller Date: Sat, 26 Jul 2014 10:24:18 +0200 Subject: [PATCH] Various fixes --- README.md | 3 ++- vvm/README.md | 5 +++++ vvm/bin/vvm | Bin 14244 -> 14252 bytes vvm/src/opcode.c | 8 ++++---- vvm/src/opcode.h | 2 ++ vvm/src/vm.c | 6 ++++++ 6 files changed, 19 insertions(+), 5 deletions(-) create mode 100644 vvm/README.md diff --git a/README.md b/README.md index 7e99d47..3d149de 100644 --- a/README.md +++ b/README.md @@ -3,4 +3,5 @@ Virtual Machines Just a bunch of immature interpreters. One interprets brainfuck code(nbfi - naive brainfuck interpreter), the other uses an assembler-like dsl(but has -no parser until now). +no parser until now, so you will have to write code within the original +programs code). diff --git a/vvm/README.md b/vvm/README.md new file mode 100644 index 0000000..15df0a1 --- /dev/null +++ b/vvm/README.md @@ -0,0 +1,5 @@ +Veits Virtual Machine +--------------------- + +A virtual machine that executes assembler-like code. + diff --git a/vvm/bin/vvm b/vvm/bin/vvm index 4ddd801733bb7b8767ccbd5b48aa3731b8478677..0314d533e75ef91375bbfa7653ba938ce4bb5400 100755 GIT binary patch delta 1531 zcmZXUeQZ-z6u{4YYr9rHIy>66v|Bp_k|jz%LT41V(6yuQX-EA?m^j77Zi`!lO%%kB z&?ZhvGaJXw{!l{9Os1g0fT@^`nXP1z&i`uk5B+aJ4Q+@KGclb5>$!ce+B|N0?z_M9 z-P8LzJ$!z6JZH+702lzAHPA*YWBTISJB(ezK_Pr^u}L--Wg8UJSA;lYKVm==Wf?rB z>1OA#py^>RV5jzty7thS;HOjVFQw+5&+KZNgmg}ObA3xz`;}3S7gOd1I(jo=R{Pn1 zx;Fbp05RpC#KC%({>7ueh$-zMBc7`NFm9)&q+})%TME2YvKvo6pa%#gi&AX&XoOua zT_1OmB3BELAn}ka>j1_{9wVtE$!P(;rQ!*C?jgCUAv=kOWQ6p~H2_m2JkM{$9y%`z z0KFs`<|ikbjfc;Nq?e45oN1eG# zn&+Vr+4M;4>q|NAa*Y~|jFsIxlA~o^XEJ-^q8MAN_Rn7?KPh=NxtRZ<79$PTb;qfU z(K$*f0i$NiuA}78G4^FSgP3aTp=pW9MQn@a=hJ~L7dA|I^vs?%czjH^ z4QgO&I|jT~&9>g037_@$1fn$5K0aAx?WgBJ4TIPEzkiae_yyQOH)g~kpOJVgDJ%Q| zu6o^U8e4qsjtgX~&NV}PS1yXJytB8ITopDjJnh@jY#|pHnJTMM#oMvqbI19ut}f;$ z=EYvGZk$Kf%Z(qQGjF`YC+Iv{DM8PZDkg-jBw^)`h4Vhz6poiC)5o>SnxON>_4KZ8 zkqe$7HnO_1mAhT!ypHTH**?d)YO+@pJ2cDoC500Tf5(|bo>m;-S4C0zMt=~?AGxF3 zDz2qs)pnDL8&!Otitn%H5Y^aOtsrhwai@yARJ<}jW l0bRGWcPMxOv;JpvzJYKs)`2apuj)pQcR%#F7e8rT{TK2pXy5<< delta 1391 zcmZXTe{54#6vyvj$r zX%oiuF`HEm#vdeP;>?JM&J_P588tKO_^&4Zp)pyAL1{w>{()v2gXj0|y_)8E((~T= ze9yi2+;?v8*GDIhW{ZvCCdN2pti28oSh(rC-$yyWNW)TpLusR)T-0-{l>0$SaXwEG zOPo*8hnDB~B$X`(_#pLJ-;sB`F?H_5sqWWLpIJCQKAel^iq^l@Qr?!{RnHfgSw zMxA@^vw?i+T`_-bby}ZVxOILgOIg>rRIgE6^B7Ol zrRIKV=L7nud6!p7+?x?66*H=w!uLegId!%)X(g}Ay=MNtrs;d6BP}8RK7HA;SK4)- z?zX(Z7bxz2RXV;xSKLu)>k8RCVg4uedt&_4+!>F9bCo97$EC-Y>F@Q=@IOdtjq{J_ zlh(MiZ%M4$iw%!$@Strtr5U={>gV5**Bfm5ZP7>%tqxLW%hxFB-OX3%bMFSekh|(# z<}|ypgVH`X$v!)Og*?7EFVV2CdyRZobWPI=cKXV91pgE{=k|9>x#u@ss26m))6PA) zy3Q_c+rnztL_0+SZp)UzVgtPtI1uSUH0`Ip?3}l<(1>7BBg7@KJaB5XZ3e~Wah}W%U zEWJq|JPvknc{MABeIfWE%Jo1VX7aN6J>1;h1jr5O9g5Gr4E1FZk_ z9o;eUvWcxIUOiqmakGhi)!d63?bQOf)5JSX95!*3e%&!enP9{={BpGK&;b1$e9?CJ bsYA-sNeYGDvhD9ayzjC7lnX84n!^4C7`-LX diff --git a/vvm/src/opcode.c b/vvm/src/opcode.c index 2673427..1110ece 100644 --- a/vvm/src/opcode.c +++ b/vvm/src/opcode.c @@ -5,17 +5,17 @@ const char* opcodes[] = {"IADD", "ISUB", "IMULT", "IDIV", "IMOD", "ILT", "IEQ", "IGT", "BR", "BRT", "BRF", "ICONST", "LOAD", "GLOAD", "STORE", "GSTORE", "PRINT", "POP", "HALT", "LEQ", "GEQ", "CALL", "RET", - "IPRINT", "FETCH"}; + "IPRINT", "FETCH", "IINC", "IDEC" }; int nargs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, - 0, 2, 0, 0, 0 }; + 0, 2, 0, 0, 0, 0, 0 }; instruction* setup_instructions(){ int i; - static instruction ins[FETCH+1]; + static instruction ins[IDEC+1]; ins[0].operands = 0; ins[0].name = NULL; - for(i = 1; i <= FETCH; i++){ + for(i = 1; i <= IDEC; i++){ ins[i].operands = nargs[i-1]; ins[i].name = opcodes[i-1]; } diff --git a/vvm/src/opcode.h b/vvm/src/opcode.h index 85cb319..903c07d 100644 --- a/vvm/src/opcode.h +++ b/vvm/src/opcode.h @@ -25,6 +25,8 @@ #define RET 23 #define IPRINT 24 #define FETCH 25 +#define IINC 26 +#define IDEC 27 typedef struct{ int operands; diff --git a/vvm/src/vm.c b/vvm/src/vm.c index 7211b98..46a4d51 100644 --- a/vvm/src/vm.c +++ b/vvm/src/vm.c @@ -34,6 +34,12 @@ void vm_execute(int code[], int ip, int datasize, int length){ disassemble(sp, fp, ip, opcode, ins, code, stack); } switch(opcode){ + case IINC: + stack[sp]++; + break; + case IDEC: + stack[sp]--; + break; case LOAD: stack[++sp] = stack[code[ip++]+fp]; break;