Various fixes
This commit is contained in:
@@ -3,4 +3,5 @@ Virtual Machines
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Just a bunch of immature interpreters. One interprets brainfuck code(nbfi -
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Just a bunch of immature interpreters. One interprets brainfuck code(nbfi -
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naive brainfuck interpreter), the other uses an assembler-like dsl(but has
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naive brainfuck interpreter), the other uses an assembler-like dsl(but has
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no parser until now).
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no parser until now, so you will have to write code within the original
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programs code).
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5
vvm/README.md
Normal file
5
vvm/README.md
Normal file
@@ -0,0 +1,5 @@
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Veits Virtual Machine
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---------------------
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A virtual machine that executes assembler-like code.
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BIN
vvm/bin/vvm
BIN
vvm/bin/vvm
Binary file not shown.
@@ -5,17 +5,17 @@
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const char* opcodes[] = {"IADD", "ISUB", "IMULT", "IDIV", "IMOD",
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const char* opcodes[] = {"IADD", "ISUB", "IMULT", "IDIV", "IMOD",
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"ILT", "IEQ", "IGT", "BR", "BRT", "BRF", "ICONST", "LOAD", "GLOAD",
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"ILT", "IEQ", "IGT", "BR", "BRT", "BRF", "ICONST", "LOAD", "GLOAD",
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"STORE", "GSTORE", "PRINT", "POP", "HALT", "LEQ", "GEQ", "CALL", "RET",
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"STORE", "GSTORE", "PRINT", "POP", "HALT", "LEQ", "GEQ", "CALL", "RET",
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"IPRINT", "FETCH"};
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"IPRINT", "FETCH", "IINC", "IDEC" };
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int nargs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0,
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int nargs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0,
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0, 2, 0, 0, 0 };
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0, 2, 0, 0, 0, 0, 0 };
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instruction* setup_instructions(){
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instruction* setup_instructions(){
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int i;
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int i;
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static instruction ins[FETCH+1];
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static instruction ins[IDEC+1];
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ins[0].operands = 0;
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ins[0].operands = 0;
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ins[0].name = NULL;
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ins[0].name = NULL;
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for(i = 1; i <= FETCH; i++){
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for(i = 1; i <= IDEC; i++){
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ins[i].operands = nargs[i-1];
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ins[i].operands = nargs[i-1];
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ins[i].name = opcodes[i-1];
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ins[i].name = opcodes[i-1];
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}
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}
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@@ -25,6 +25,8 @@
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#define RET 23
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#define RET 23
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#define IPRINT 24
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#define IPRINT 24
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#define FETCH 25
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#define FETCH 25
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#define IINC 26
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#define IDEC 27
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typedef struct{
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typedef struct{
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int operands;
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int operands;
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@@ -34,6 +34,12 @@ void vm_execute(int code[], int ip, int datasize, int length){
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disassemble(sp, fp, ip, opcode, ins, code, stack);
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disassemble(sp, fp, ip, opcode, ins, code, stack);
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}
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}
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switch(opcode){
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switch(opcode){
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case IINC:
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stack[sp]++;
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break;
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case IDEC:
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stack[sp]--;
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break;
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case LOAD:
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case LOAD:
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stack[++sp] = stack[code[ip++]+fp];
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stack[++sp] = stack[code[ip++]+fp];
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break;
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break;
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